There is an information processing system of which a housing is equipped with a plurality of computation nodes including CPUs (Central Processing Units) on a one-by-one basis in order to perform a business-oriented computing process and a research-oriented computing process in parallel at a high speed. In this type of information processing system, jobs inputted by an operator are accumulated in a queue, then taken one by one out of the queue, subsequently assigned to unoccupied computation nodes, and thus executed.
By the way, when a temperature of the CPU itself rises, a fault rate of the CPU increases, and power consumption also rises. Hence, some of the CPUs have an overheat prevention function for protecting the CPUs themselves. The overheat prevention function is that the CPU, when its temperature rises, reduces a clock count and a pipeline count by making an operation mode transition to a power saving mode from a normal mode, and thus restrains the power consumption down to a minimum level, thereby cooling the CPU itself. Each of the computation nodes within the information processing system described above can be configured to include the CPU having the overheat prevention function.
If a scheme is that jobs are simply assigned to the unoccupied computation nodes, however, the jobs are concentrated on the specified computation node in such a case that the CPUs of all of the computation nodes within the information processing system have the overheat prevention functions, it happens that a temperature of the CPU of the job-concentrated computation node rises. The job-concentrated computation node has a high frequency that the CPU transitions to the power saving mode, and hence, when examining the whole information processing system, there exists a possibility that execution efficiency decreases due to the overheat prevention functions held by the CPUs.
Note that generally a greater quantity of heat stagnates on the upper side than on the lower side within the housing of the information processing system, and therefore the computation nodes installed on the upper side have a high possibility that the CPUs thereof transition to the power saving mode. Such being the case, a thinkable scheme is that the upper side is cooled more intensively than on the lower side within the housing by adequately disposing cooling means such as a fan and an air conditioner in a way that estimates a temperature distribution within the housing.
It is, however, known that the CPUs manufactured based on a process rule on the order of 90 nm or 65 nm in recent years (which is also referred to as a manufacturing process and represents micronization of wiring of an integrated circuit) are classified in terms of their electric structures into those easy to get heated and those hard to get heated, and it is presumed that a decrease in the execution efficiency of the information processing system can not be thoroughly restrained simply by cooling intensively the upper side within the housing.
Under such circumstances, eventually the conventional information processing system has nothing but to cool the interior of the housing more than needed in order for the CPUs of all of the computation nodes not to transition to the power saving mode. Note that a cost for cooling the CPU has a tendency of rising exponentially corresponding to a level of a CPU packaging density, and a cost for cooling the whole information processing system sharply increases simply by giving a slight allowance to a cooling capability if the information processing system has the high CPU packaging density.
[Patent document 1] Japanese Laid-Open Application Publication No. 2007-179437
[Patent document 2] Japanese Laid-Open Application Publication No. 2005-316764
[Patent document 3] Japanese Laid-Open Application Publication No. 2005-115956